FreeCAD: master fcd0465d

Author Committer Branch Timestamp Parent
yorik yorik master 2016-12-01 17:42:51 master 04a56fbc
Changeset Draft: Minor bugfixes in wire flattening code
mod - src/Mod/Draft/DraftGeomUtils.py Diff File
mod - src/Mod/Draft/WorkingPlane.py Diff File